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#define | _MM_K0_REG (0xffff) |
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#define | _mm512_setzero() _mm512_setzero_ps() |
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#define | _mm512_undefined() _mm512_setzero() |
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#define | _mm512_undefined_pd() _mm512_setzero_pd() |
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#define | _mm512_undefined_ps() _mm512_undefined() |
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#define | _mm512_set4_ps(a, b, c, d) |
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#define | _mm512_set4_pd(a, b, c, d) _mm512_set_pd((a), (b), (c), (d), (a), (b), (c), (d)) |
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#define | _mm512_setr_ps(e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15) |
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#define | _mm512_set_16to16_ps(e0, e1, e2, e3, e4, e5, e6, e7, e8, e9, e10, e11, e12, e13, e14, e15) |
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#define | _mm512_setr_pd(e0, e1, e2, e3, e4, e5, e6, e7) _mm512_set_pd((e7), (e6), (e5), (e4), (e3), (e2), (e1), (e0)) |
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#define | _mm512_set_8to8_pd(e0, e1, e2, e3, e4, e5, e6, e7) _mm512_set_pd((e0), (e1), (e2), (e3), (e4), (e5), (e6), (e7)) |
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#define | _mm512_setr4_ps(a, b, c, d) _mm512_set4_ps((d), (c), (b), (a)) |
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#define | _mm512_set_4to16_ps(a, b, c, d) _mm512_set4_ps((d), (c), (b), (a)) |
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#define | _mm512_setr4_pd(a, b, c, d) _mm512_set4_pd((d), (c), (b), (a)) |
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#define | _mm512_set_4to8_pd(a, b, c, d) _mm512_set4_pd((d), (c), (b), (a)) |
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#define | _mm512_set_1to16_ps(x) _mm512_set1_ps((x)) |
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#define | _mm512_set_1to8_pd(x) _mm512_set1_pd((x)) |
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#define | _mm512_load_ps(x) _mm512_maskz_load_ps(_MM_K0_REG, (x)) |
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#define | _mm512_load_pd(x) _mm512_maskz_load_pd((__mmask8)_MM_K0_REG, (x)) |
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#define | _mm512_loadu_ps(x) _mm512_maskz_loadu_ps(_MM_K0_REG, (x)) |
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#define | _mm512_loadu_pd(x) _mm512_maskz_loadu_pd((__mmask8)_MM_K0_REG, (x)) |
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#define | _mm512_store_ps(x, v) _mm512_mask_store_ps((x), _MM_K0_REG, (v)) |
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#define | _mm512_store_pd(x, v) _mm512_mask_store_pd((x), (__mmask8)_MM_K0_REG, (v)) |
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#define | _mm512_add_ps(v1, v2) _mm512_maskz_add_round_ps(_MM_K0_REG, (v1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_add_round_ps(v1, v2, e3) _mm512_maskz_add_round_ps(_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_maskz_add_ps(k1, v2, v3) _mm512_maskz_add_round_ps((k1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_add_ps(v1, k2, v3, v4) _mm512_mask_add_round_ps((v1), (k2), (v3), (v4), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_add_pd(v1, v2) _mm512_maskz_add_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_add_round_pd(v1, v2, e3) _mm512_maskz_add_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_maskz_add_pd(k1, v2, v3) _mm512_maskz_add_round_pd((k1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_add_pd(v1, k2, v3, v4) _mm512_mask_add_round_pd((v1), (k2), (v3), (v4), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_sub_ps(v1, v2) _mm512_maskz_sub_round_ps(_MM_K0_REG, (v1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_sub_round_ps(v1, v2, e3) _mm512_maskz_sub_round_ps(_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_maskz_sub_ps(k1, v2, v3) _mm512_maskz_sub_round_ps((k1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_sub_ps(v1, k2, v3, v4) _mm512_mask_sub_round_ps((v1), (k2), (v3), (v4), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_sub_pd(v1, v2) _mm512_maskz_sub_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_sub_round_pd(v1, v2, e3) _mm512_maskz_sub_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_maskz_sub_pd(k1, v2, v3) _mm512_maskz_sub_round_pd((k1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_sub_pd(v1, k2, v3, v4) _mm512_mask_sub_round_pd((v1), (k2), (v3), (v4), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mul_ps(v1, v2) _mm512_maskz_mul_round_ps(_MM_K0_REG, (v1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mul_round_ps(v1, v2, e3) _mm512_maskz_mul_round_ps(_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_maskz_mul_ps(k1, v2, v3) _mm512_maskz_mul_round_ps((k1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_mul_ps(v1, k2, v3, v4) _mm512_mask_mul_round_ps((v1), (k2), (v3), (v4), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mul_pd(v1, v2) _mm512_maskz_mul_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mul_round_pd(v1, v2, e3) _mm512_maskz_mul_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_maskz_mul_pd(k1, v2, v3) _mm512_maskz_mul_round_pd((k1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_mul_pd(v1, k2, v3, v4) _mm512_mask_mul_round_pd((v1), (k2), (v3), (v4), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_div_ps(v1, v2) _mm512_maskz_div_round_ps(_MM_K0_REG, (v1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_div_round_ps(v1, v2, e3) _mm512_maskz_div_round_ps(_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_maskz_div_ps(k1, v2, v3) _mm512_maskz_div_round_ps((k1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_div_ps(v1, k2, v3, v4) _mm512_mask_div_round_ps((v1), (k2), (v3), (v4), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_div_pd(v1, v2) _mm512_maskz_div_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_div_round_pd(v1, v2, e3) _mm512_maskz_div_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_maskz_div_pd(k1, v2, v3) _mm512_maskz_div_round_pd((k1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_div_pd(v1, k2, v3, v4) _mm512_mask_div_round_pd((v1), (k2), (v3), (v4), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_fmadd_round_ps(v1, v2, v3, e4) _mm512_maskz_fmadd_round_ps(_MM_K0_REG, (v1), (v2), (v3), (e4)) |
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#define | _mm512_fmadd_ps(v1, v2, v3) _mm512_fmadd_round_ps((v1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_fmadd_ps(v1, k1, v2, v3) |
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#define | _mm512_maskz_fmadd_ps(k1, v1, v2, v3) |
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#define | _mm512_fmadd_round_pd(v1, v2, v3, e4) _mm512_maskz_fmadd_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), (v3), (e4)) |
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#define | _mm512_fmadd_pd(v1, v2, v3) _mm512_fmadd_round_pd((v1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_fmadd_pd(v1, k1, v2, v3) |
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#define | _mm512_maskz_fmadd_pd(k1, v1, v2, v3) |
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#define | _mm512_fmsub_round_ps(v1, v2, v3, e4) _mm512_maskz_fmsub_round_ps(_MM_K0_REG, (v1), (v2), (v3), (e4)) |
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#define | _mm512_fmsub_ps(v1, v2, v3) _mm512_fmsub_round_ps((v1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_fmsub_ps(v1, k1, v2, v3) |
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#define | _mm512_maskz_fmsub_ps(k1, v1, v2, v3) |
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#define | _mm512_fmsub_round_pd(v1, v2, v3, e4) _mm512_maskz_fmsub_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), (v3), (e4)) |
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#define | _mm512_fmsub_pd(v1, v2, v3) _mm512_fmsub_round_pd((v1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_fmsub_pd(v1, k1, v2, v3) |
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#define | _mm512_maskz_fmsub_pd(k1, v1, v2, v3) |
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#define | _mm512_fnmadd_round_ps(v1, v2, v3, e4) _mm512_maskz_fnmadd_round_ps(_MM_K0_REG, (v1), (v2), (v3), (e4)) |
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#define | _mm512_fnmadd_ps(v1, v2, v3) _mm512_fnmadd_round_ps((v1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_fnmadd_ps(v1, k1, v2, v3) |
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#define | _mm512_maskz_fnmadd_ps(k1, v1, v2, v3) |
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#define | _mm512_fnmadd_round_pd(v1, v2, v3, e4) _mm512_maskz_fnmadd_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), (v3), (e4)) |
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#define | _mm512_fnmadd_pd(v1, v2, v3) _mm512_fnmadd_round_pd((v1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_fnmadd_pd(v1, k1, v2, v3) |
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#define | _mm512_maskz_fnmadd_pd(k1, v1, v2, v3) |
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#define | _mm512_fnmsub_round_ps(v1, v2, v3, e4) _mm512_maskz_fnmsub_round_ps(_MM_K0_REG, (v1), (v2), (v3), (e4)) |
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#define | _mm512_fnmsub_ps(v1, v2, v3) _mm512_fnmsub_round_ps((v1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_fnmsub_ps(v1, k1, v2, v3) |
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#define | _mm512_maskz_fnmsub_ps(k1, v1, v2, v3) |
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#define | _mm512_fnmsub_round_pd(v1, v2, v3, e4) _mm512_maskz_fnmsub_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), (v3), (e4)) |
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#define | _mm512_fnmsub_pd(v1, v2, v3) _mm512_fnmsub_round_pd((v1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_fnmsub_pd(v1, k1, v2, v3) |
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#define | _mm512_maskz_fnmsub_pd(k1, v1, v2, v3) |
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#define | _mm512_sqrt_ps(v1) _mm512_maskz_sqrt_round_ps(_MM_K0_REG, (v1), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_sqrt_round_ps(v1, e2) _mm512_maskz_sqrt_round_ps(_MM_K0_REG, (v1), e2) |
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#define | _mm512_mask_sqrt_ps(v1, k2, v2) _mm512_mask_sqrt_round_ps(v1, k2, v2, _MM_FROUND_CUR_DIRECTION); |
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#define | _mm512_maskz_sqrt_ps(k1, v1) _mm512_maskz_sqrt_round_ps((k1), (v1), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_sqrt_pd(v1) _mm512_maskz_sqrt_round_pd((__mmask8)_MM_K0_REG, (v1), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_sqrt_round_pd(v1, e2) _mm512_maskz_sqrt_round_pd((__mmask8)_MM_K0_REG, (v1), e2) |
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#define | _mm512_mask_sqrt_pd(v1, k2, v2) _mm512_mask_sqrt_round_pd(v1, k2, v2, _MM_FROUND_CUR_DIRECTION); |
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#define | _mm512_maskz_sqrt_pd(k1, v1) _mm512_maskz_sqrt_round_pd((k1), (v1), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_abs_ps(v1) _mm512_maskz_abs_ps(_MM_K0_REG, (v1)) |
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#define | _mm512_abs_pd(v1) _mm512_maskz_abs_pd((__mmask8)_MM_K0_REG, (v1)) |
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#define | _mm512_max_ps(v1, v2) _mm512_maskz_max_round_ps(_MM_K0_REG, (v1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_max_round_ps(v1, v2, e3) _mm512_maskz_max_round_ps(_MM_K0_REG, (v1), (v2), e3) |
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#define | _mm512_mask_max_ps(v1, k2, v3, v4) _mm512_mask_max_round_ps((v1), (k2), (v3), (v4), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_maskz_max_ps(k1, v2, v3) _mm512_maskz_max_round_ps((k1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_max_pd(v1, v2) _mm512_maskz_max_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_max_round_pd(v1, v2, e3) _mm512_maskz_max_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), e3) |
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#define | _mm512_mask_max_pd(v1, k2, v3, v4) _mm512_mask_max_round_pd((v1), (k2), (v3), (v4), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_maskz_max_pd(k1, v2, v3) _mm512_maskz_max_round_pd((k1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_min_ps(v1, v2) _mm512_maskz_min_round_ps(_MM_K0_REG, (v1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_min_round_ps(v1, v2, e3) _mm512_maskz_min_round_ps(_MM_K0_REG, (v1), (v2), e3) |
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#define | _mm512_mask_min_ps(v1, k2, v3, v4) _mm512_mask_min_round_ps((v1), (k2), (v3), (v4), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_maskz_min_ps(k1, v2, v3) _mm512_maskz_min_round_ps((k1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_min_pd(v1, v2) _mm512_maskz_min_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_min_round_pd(v1, v2, e3) _mm512_maskz_min_round_pd((__mmask8)_MM_K0_REG, (v1), (v2), e3) |
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#define | _mm512_mask_min_pd(v1, k2, v3, v4) _mm512_mask_min_round_pd((v1), (k2), (v3), (v4), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_maskz_min_pd(k1, v2, v3) _mm512_maskz_min_round_pd((k1), (v2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_rcp14_ps(v1) _mm512_maskz_rcp14_ps(_MM_K0_REG, v1); |
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#define | _mm512_rcp14_pd(v1) _mm512_maskz_rcp14_pd((__mmask8)_MM_K0_REG, v1); |
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#define | _mm512_rsqrt14_ps(v1) _mm512_maskz_rsqrt14_ps(_MM_K0_REG, v1); |
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#define | _mm512_rsqrt14_pd(v1) _mm512_maskz_rsqrt14_pd((__mmask8)_MM_K0_REG, v1); |
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#define | _mm512_cvt_roundps_pd(v1, e2) _mm512_maskz_cvt_roundps_pd((__mmask8)_MM_K0_REG, (v1), e2) |
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#define | _mm512_cvtps_pd(v1) _mm512_cvt_roundps_pd((v1), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_maskz_cvtps_pd(k1, v2) _mm512_maskz_cvt_roundps_pd((k1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_cvtps_pd(v1, k2, v3) _mm512_mask_cvt_roundps_pd((v1), (k2), (v3), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_cvt_roundpd_ps(v1, e2) _mm512_maskz_cvt_roundpd_ps((__mmask8)_MM_K0_REG, (v1), e2) |
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#define | _mm512_cvtpd_ps(v1) _mm512_cvt_roundpd_ps((v1), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_maskz_cvtpd_ps(k1, v2) _mm512_maskz_cvt_roundpd_ps((k1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_mask_cvtpd_ps(v1_old, k1, v2) _mm512_mask_cvt_roundpd_ps((v1_old), (k1), (v2), _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_cmp_ps_mask(v1, v2, i3) _mm512_mask_cmp_round_ps_mask(_MM_K0_REG, v1, v2, i3, _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_cmp_round_ps_mask(v1, v2, i3, e4) _mm512_mask_cmp_round_ps_mask(_MM_K0_REG, v1, v2, i3, e4) |
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#define | _mm512_mask_cmp_ps_mask(k1, v2, v3, i4) _mm512_mask_cmp_round_ps_mask(k1, v2, v3, i4, _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_cmp_pd_mask(v1, v2, i3) _mm512_mask_cmp_round_pd_mask((__mmask8)_MM_K0_REG, v1, v2, i3, _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_cmp_round_pd_mask(v1, v2, i3, e4) _mm512_mask_cmp_round_pd_mask((__mmask8)_MM_K0_REG, v1, v2, i3, e4) |
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#define | _mm512_mask_cmp_pd_mask(k1, v2, v3, i4) _mm512_mask_cmp_round_pd_mask(k1, v2, v3, i4, _MM_FROUND_CUR_DIRECTION) |
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#define | _mm512_cmpeq_ps_mask(v1, v2) _mm512_cmp_ps_mask((v1), (v2), _CMP_EQ_OQ) |
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#define | _mm512_mask_cmpeq_ps_mask(k1, v1, v2) _mm512_mask_cmp_ps_mask((k1), (v1), (v2), _CMP_EQ_OQ) |
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#define | _mm512_cmplt_ps_mask(v1, v2) _mm512_cmp_ps_mask((v1), (v2), _CMP_LT_OS) |
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#define | _mm512_mask_cmplt_ps_mask(k1, v1, v2) _mm512_mask_cmp_ps_mask((k1), (v1), (v2), _CMP_LT_OS) |
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#define | _mm512_cmple_ps_mask(v1, v2) _mm512_cmp_ps_mask((v1), (v2), _CMP_LE_OS) |
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#define | _mm512_mask_cmple_ps_mask(k1, v1, v2) _mm512_mask_cmp_ps_mask((k1), (v1), (v2), _CMP_LE_OS) |
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#define | _mm512_cmpunord_ps_mask(v1, v2) _mm512_cmp_ps_mask((v1), (v2), _CMP_UNORD_Q) |
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#define | _mm512_mask_cmpunord_ps_mask(k1, v1, v2) _mm512_mask_cmp_ps_mask((k1), (v1), (v2), _CMP_UNORD_Q) |
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#define | _mm512_cmpneq_ps_mask(v1, v2) _mm512_cmp_ps_mask((v1), (v2), _CMP_NEQ_UQ) |
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#define | _mm512_mask_cmpneq_ps_mask(k1, v1, v2) _mm512_mask_cmp_ps_mask((k1), (v1), (v2), _CMP_NEQ_UQ) |
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#define | _mm512_cmpnlt_ps_mask(v1, v2) _mm512_cmp_ps_mask((v1), (v2), _CMP_NLT_US) |
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#define | _mm512_mask_cmpnlt_ps_mask(k1, v1, v2) _mm512_mask_cmp_ps_mask((k1), (v1), (v2), _CMP_NLT_US) |
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#define | _mm512_cmpnle_ps_mask(v1, v2) _mm512_cmp_ps_mask((v1), (v2), _CMP_NLE_US) |
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#define | _mm512_mask_cmpnle_ps_mask(k1, v1, v2) _mm512_mask_cmp_ps_mask((k1), (v1), (v2), _CMP_NLE_US) |
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#define | _mm512_cmpord_ps_mask(v1, v2) _mm512_cmp_ps_mask((v1), (v2), _CMP_ORD_Q) |
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#define | _mm512_mask_cmpord_ps_mask(k1, v1, v2) _mm512_mask_cmp_ps_mask((k1), (v1), (v2), _CMP_ORD_Q) |
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#define | _mm512_cmpeq_pd_mask(v1, v2) _mm512_cmp_pd_mask((v1), (v2), _CMP_EQ_OQ) |
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#define | _mm512_mask_cmpeq_pd_mask(k1, v1, v2) _mm512_mask_cmp_pd_mask((k1), (v1), (v2), _CMP_EQ_OQ) |
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#define | _mm512_cmplt_pd_mask(v1, v2) _mm512_cmp_pd_mask((v1), (v2), _CMP_LT_OS) |
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#define | _mm512_mask_cmplt_pd_mask(k1, v1, v2) _mm512_mask_cmp_pd_mask((k1), (v1), (v2), _CMP_LT_OS) |
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#define | _mm512_cmple_pd_mask(v1, v2) _mm512_cmp_pd_mask((v1), (v2), _CMP_LE_OS) |
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#define | _mm512_mask_cmple_pd_mask(k1, v1, v2) _mm512_mask_cmp_pd_mask((k1), (v1), (v2), _CMP_LE_OS) |
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#define | _mm512_cmpunord_pd_mask(v1, v2) _mm512_cmp_pd_mask((v1), (v2), _CMP_UNORD_Q) |
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#define | _mm512_mask_cmpunord_pd_mask(k1, v1, v2) _mm512_mask_cmp_pd_mask((k1), (v1), (v2), _CMP_UNORD_Q) |
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#define | _mm512_cmpneq_pd_mask(v1, v2) _mm512_cmp_pd_mask((v1), (v2), _CMP_NEQ_UQ) |
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#define | _mm512_mask_cmpneq_pd_mask(k1, v1, v2) _mm512_mask_cmp_pd_mask((k1), (v1), (v2), _CMP_NEQ_UQ) |
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#define | _mm512_cmpnlt_pd_mask(v1, v2) _mm512_cmp_pd_mask((v1), (v2), _CMP_NLT_US) |
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#define | _mm512_mask_cmpnlt_pd_mask(k1, v1, v2) _mm512_mask_cmp_pd_mask((k1), (v1), (v2), _CMP_NLT_US) |
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#define | _mm512_cmpnle_pd_mask(v1, v2) _mm512_cmp_pd_mask((v1), (v2), _CMP_NLE_US) |
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#define | _mm512_mask_cmpnle_pd_mask(k1, v1, v2) _mm512_mask_cmp_pd_mask((k1), (v1), (v2), _CMP_NLE_US) |
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#define | _mm512_cmpord_pd_mask(v1, v2) _mm512_cmp_pd_mask((v1), (v2), _CMP_ORD_Q) |
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#define | _mm512_mask_cmpord_pd_mask(k1, v1, v2) _mm512_mask_cmp_pd_mask((k1), (v1), (v2), _CMP_ORD_Q) |
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#define | _mm512_broadcast_f32x2(v1) _mm512_maskz_broadcast_f32x2(_MM_K0_REG, (v1)) |
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#define | _mm512_broadcast_f32x4(v1) _mm512_maskz_broadcast_f32x4(_MM_K0_REG, (v1)) |
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#define | _mm512_broadcast_f32x8(v1) _mm512_maskz_broadcast_f32x8(_MM_K0_REG, (v1)) |
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#define | _mm512_broadcast_f64x2(v1) _mm512_maskz_broadcast_f64x2((__mmask8)_MM_K0_REG, (v1)) |
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#define | _mm512_broadcast_f64x4(v1) _mm512_maskz_broadcast_f64x4((__mmask8)_MM_K0_REG, (v1)) |
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#define | _mm512_broadcastsd_pd(v1) _mm512_maskz_broadcastsd_pd((__mmask8)_MM_K0_REG, (v1)) |
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#define | _mm512_broadcastss_ps(v1) _mm512_maskz_broadcastss_ps(_MM_K0_REG, (v1)) |
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#define | _mm512_extractf32x4_ps(v1, e2) _mm512_maskz_extractf32x4_ps((__mmask8)_MM_K0_REG, (v1), (e2)) |
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#define | _mm512_extractf32x8_ps(v1, e2) _mm512_maskz_extractf32x8_ps((__mmask8)_MM_K0_REG, (v1), (e2)) |
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#define | _mm512_extractf64x2_pd(v1, e2) _mm512_maskz_extractf64x2_pd((__mmask8)_MM_K0_REG, (v1), (e2)) |
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#define | _mm512_extractf64x4_pd(v1, e2) _mm512_maskz_extractf64x4_pd((__mmask8)_MM_K0_REG, (v1), (e2)) |
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#define | _mm512_insertf32x4(v1, v2, e3) _mm512_maskz_insertf32x4(_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_insertf32x8(v1, v2, e3) _mm512_maskz_insertf32x8(_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_insertf64x2(v1, v2, e3) _mm512_maskz_insertf64x2((__mmask8)_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_insertf64x4(v1, v2, e3) _mm512_maskz_insertf64x4((__mmask8)_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_shuffle_f32x4(v1, v2, e3) _mm512_maskz_shuffle_f32x4(_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_shuffle_f64x2(v1, v2, e3) _mm512_maskz_shuffle_f64x2((__mmask8)_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_shuffle_pd(v1, v2, e3) _mm512_maskz_shuffle_pd((__mmask8)_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_shuffle_ps(v1, v2, e3) _mm512_maskz_shuffle_ps(_MM_K0_REG, (v1), (v2), (e3)) |
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#define | _mm512_kand(k1, k2) ((__mmask16) ((k1) & (k2))) |
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#define | _mm512_kandn(k1, k2) ((__mmask16) (~(k1) & (k2))) |
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#define | _mm512_kor(k1, k2) ((__mmask16) ((k1) | (k2))) |
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#define | _mm512_kxor(k1, k2) ((__mmask16) ((k1) ^ (k2))) |
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#define | _mm512_kxnor(k1, k2) ((__mmask16) (~((k1) ^ (k2)))) |
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#define | _mm512_knot(k1) ((__mmask16) (~(k1))) |
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